The present disclosure relates generally to semiconductor fabrication and, more particularly, to a method of depositing materials onto a semiconductor substrate (e.g., wafer).
In integrated circuit (IC) manufacturing technology, a photoresist (resist) layer is typically applied to a semiconductor wafer surface, followed by a soft bake, and an exposure of the resist through a photomask. A post-exposure baking process and a developing process are then performed to form a patterned resist layer with openings. After verification that the resist is within fabrication specifications, the wafer is processed using the patterned resist as a masking element. Following processing (e.g., etch, implant, etc) of the wafer, the resist layer may be stripped.
In conventional photoresist deposition—spin-on coating—the photoresist layer suffers from non-uniform chemical distribution and intermixing with other layers. This non-uniform chemical distribution can negatively affect line edge roughness and cause pin holes to form in the sidewalls of the resist pattern after development. This effect is especially problematic for thin photoresists of less than 75 nm, which is needed for high lithography resolution. Similar issues are provided with other deposition materials (e.g., coatings) that may be deposited on the substrate.
It would therefore be desirable to have an improved method and system of depositing materials onto a semiconductor wafer.